Updated 2001 July 12

Pentium colorForth

Boots into 32-bit mode with a flat address space. Segment registers are based at zero; essentially unused. Interrupts off. Protections off.

Data are addressed as 32-bit words, not bytes. But ESP and ESI hold byte addresses, for optimization. Instructions are optimized if agruments are literals.

Registers are assigned:

27 chip primitives
0word ;jmpJump to word; tail recursion
1ifjzJump to 'then' if zero
2wordcallCall word
3-ifjnsJump to 'then' if not negative
6;retReturn to calling word
8@mov EAX, [EAX*4]Fetch from address on stack
dup; mov EAX, a
9@+dup; mov EAX, [EDX*4]
inc EDX
Fetch from address in A; increment A
andup; mov EAX, nFetch number
b@rFetch from address in R
c!a!; mov [EDX*4], EAX; dropStore to address on stack
mov a*4, EAX; drop
mov a*4, n
e!+mov [EDX*4], EAX; inc EDXStore to address in A; increment A
f!rStore to address in R; increment R
102*shl EAX, 1Shift stack left
112/sar EAX, 1Shift stack right, propagate sign
12-not EAXOnes complement stack
14andand EAX, [ESI]; nipAnd to stack
and EAX, n
15orxor EAX, [ESI]; nipExclusive-or to stack
xor EAX, n
16+add EAX, [ESI]; nipAdd to stack
add EAX, n
17*+Multiply step
18pushpush EAX; dropPush stack onto Return
19aLoad A register onto stack
1aduplea ESI, ESI-4; mov [ESI], EAXDuplicate stack
1boverdup; mov EAX, [ESI+4]Load 2nd datum onto stack
1cpopdup; pop EAXPop Return onto stack
1da!mov EDX, EAX; dropStore stack into A register
1edroplodsdDiscard stack
1fnopnopDo nothing

Other Pentium macros:
niplea ESI, ESI+4Discard 2nd stack item; preserve flags
swapmov EDX, EAX;
mov EAX, [ESI]; mov [ESI], EDX
Exchange stack with 2nd number
+!a!; add [EDX], EAX; dropAdd to address on stack
add a*4, EAX; drop
add a*4, n
*imul EAX, [ESI]; nipMultiply with stack
imul EAX, n
*/mov ECX, EAX; drop
imul [ESI]; idiv [ECX]; nip
Multiply 2 numbers, divide by stack